CVE-2024-42279

spi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer

References

Notes

 carnil> Introduced in 9ac8d17694b6 ("spi: add support for microchip fpga spi
 carnil> controllers"). Vulnerable versions: 6.0-rc1.

Bugs

Status

Branch Status
upstream released (6.11-rc1) [9cf71eb0faef4bff01df4264841b8465382d7927]
6.18-upstream-stable N/A "Fixed before branching point"
6.17-upstream-stable N/A "Fixed before branching point"
6.12-upstream-stable N/A "Fixed before branching point"
6.10-upstream-stable released (6.10.3) [45e03d35229b680b79dfea1103a1f2f07d0b5d75]
6.6-upstream-stable released (6.6.44) [3feda3677e8bbe833c3a62a4091377a08f015b80]
6.1-upstream-stable needed
5.10-upstream-stable N/A "Vulnerable code not present"
4.19-upstream-stable N/A "Vulnerable code not present"
sid released (6.10.3-1)
6.12-trixie-security N/A "Fixed before branching point"
6.1-bookworm-security needed
5.10-bullseye-security N/A "Vulnerable code not present"